122 search results - page 1 / 25 » User-controllable coherence for high performance shared memo... |
PPOPP
2003
ACM
13 years 10 months ago
2003
ACM
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
ISCA
1993
IEEE
13 years 9 months ago
1993
IEEE
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
HIPC
2007
Springer
13 years 11 months ago
2007
Springer
Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed...
MAM
2002
13 years 4 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blocks for software distributed shared memory systems. Two distinct approaches hav...