VT Matrix Multiply Design for MEMOCODE '07

This design presents a system optimized for complex matrix multiplications on the XUP Virtex-II board. Utilizing the GEZEL HW/SW co-simulation environment, the resulting system achieves ˜25x speedup over a standard software only implementation. Further system level optimization (with DMA) results in the same coprocessor being speedup by at least another order of magnitude.

• Type: Conference
• Year: 2007
• Where: MEMOCODE
• Authors: Eric Simpson, Pengyuan Yu, Patrick Schaumont, Sumit Ahuja, Sandeep K. Shukla
• Keywords: Complex Matrix Multiplications, MEMOCODE 2007, Speedup, XUP Virtex-II Board