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ICCAD
2003
IEEE

On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis

14 years 15 days ago
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible gate sizing, net buffering and detail placement require a certain amount of unused space in every region of the die. The need for “local” whitespace is further emphasized by temperature and power-density limits. Another requirement, the stability of placement results from run to run, is important to the convergence of physical synthesis loops. Indeed, logic resynthesis targetting local congestion in a given placement or particular critical paths may be irrelevant for another placement produced by the same or a different layout tool. In this work we offer solutions to the above problems. We show how to tie the results of a placer to a previously existing placement, and yet leave room for optimization. In our experiments this technique produces placements with similar congestion maps. We also show how to t...
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2003
Where ICCAD
Authors Saurabh N. Adya, Igor L. Markov, Paul Villarrubia
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