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ISCAS
2006
IEEE

Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies

10 years 5 months ago
Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies
A new circuit technique is proposed in this paper for simultaneously reducing the subthreshold and gate oxide leakage power in domino logic circuits. PMOS-only sleep transistors are utilized along with a dual threshold voltage CMOS technology to place an idle domino circuit into a low leakage state. The effectiveness of the circuit technique is evaluated for a widetemperature spectrum, considering both long and short idle periods. Assuming a short idle period at a temperature of 110o C, up to 95.6% reduction in leakage power is observed as compared to standard dual threshold voltage domino circuits. Alternatively, assuming a long idle period at the room temperature, the circuit technique reduces the leakage power by up to 96.9% as compared to the standard dual threshold voltage domino logic circuits. Furthermore, by employing PMOS-only sleep transistors, the presented circuit technique reduces the total leakage power by up to 43.8% as compared to a previously published sleep scheme bas...
Volkan Kursun, Zhiyu Liu
Added 12 Jun 2010
Updated 12 Jun 2010
Type Conference
Year 2006
Where ISCAS
Authors Volkan Kursun, Zhiyu Liu
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