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ICCD
2004
IEEE

XTalkDelay: A Crosstalk-Aware Timing Analysis Tool for Chip-Level Designs

12 years 5 months ago
XTalkDelay: A Crosstalk-Aware Timing Analysis Tool for Chip-Level Designs
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDelay methodology, vis-a-vis other approaches, is its high delay computation accuracy. It deliberately avoids the use of approximate models for cells and nets and interconnect reductions. XTalkDelay employs a path-based approach; uses detailed and accurate distributed RC parasitics for critical nets and their aggressors; uses BSIM3accurate gate models; and invokes HSPICE for delay computation using only the minimum required set of input patterns. XTalkDelay has been successfully applied on two industrial designs.
Yinghua Li, Rajeev Murgai, Takashi Miyoshi, Ashwin
Added 16 Mar 2010
Updated 16 Mar 2010
Type Conference
Year 2004
Where ICCD
Authors Yinghua Li, Rajeev Murgai, Takashi Miyoshi, Ashwini Verma
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