Sciweavers

MASCOTS
2010
13 years 6 months ago
PUD-LRU: An Erase-Efficient Write Buffer Management Algorithm for Flash Memory SSD
Flash memory SSDs pose a well-known challenge, that is, the erase-before-write problem. Researchers try to solve this inherent problem from two different angles by either designing...
Jian Hu, Hong Jiang, Lei Tian, Lei Xu
ALIFE
2010
13 years 3 months ago
The Utility of Evolving Simulated Robot Morphology Increases with Task Complexity for Object Manipulation
Embodied artificial intelligence argues that the body and brain play equally important roles in the generation of adaptive behavior. An increasingly common approach therefore is to...
Josh Bongard
MASCOTS
2010
13 years 6 months ago
Barra: A Parallel Functional Simulator for GPGPU
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
Sylvain Collange, Marc Daumas, David Defour, David...
MASCOTS
2010
13 years 6 months ago
Modeling the Run-time Behavior of Transactional Memory
In this paper, we develop a queuing theory based analytical model to evaluate the performance of transactional memory. Based on the statistical characteristics observed on actual e...
Zhengyu He, Bo Hong
PATMOS
2010
Springer
13 years 2 months ago
Clock Network Synthesis with Concurrent Gate Insertion
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham
Modeling And Simulation
Top of PageReset Settings