48 search results - page 1 / 10 » A Behavioral Synthesis Approach for Distributed Memory FPGA ... |
FPL
2007
Springer
13 years 11 months ago
2007
Springer
ASPDAC
2012
ACM
12 years 1 months ago
2012
ACM
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...