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DATE
2008
IEEE
120views Hardware» more  DATE 2008»
13 years 11 months ago
A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder
Chip reliability becomes a great threat to the design of future microelectronic systems with the continuation of the progressive downscaling of CMOS technologies. Hence increasing...
Matthias May, Matthias Alles, Norbert Wehn
SIPS
2007
IEEE
13 years 11 months ago
Design and Analysis of LDPC Decoders for Software Defined Radio
Low Density Parity Check (LDPC) codes are one of the most promising error correction codes that are being adopted by many wireless standards. This paper presents a case study for ...
Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali...
ICC
2009
IEEE
176views Communications» more  ICC 2009»
13 years 11 months ago
Error Resilient Non-Asymmetric Slepian-Wolf Coding
Abstract—We consider non-asymmetric distributed source coding (DSC) that achieves any point in the Slepian-Wolf (SW) region. We study the error propagation phenomena and propose ...
Cédric Herzet, Velotiaray Toto-Zarasoa, Ali...
ISCAS
2011
IEEE
288views Hardware» more  ISCAS 2011»
12 years 8 months ago
Multi-layer parallel decoding algorithm and vlsi architecture for quasi-cyclic LDPC codes
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
Yang Sun, Guohui Wang, Joseph R. Cavallaro