31 search results - page 3 / 7 » A Comprehensive SoC Design Methodology for Nanometer Design ... |
DAC
1999
ACM
13 years 9 months ago
1999
ACM
ion model or flexible PCB solutions cannot offer a valid solution for the next millinium SoCs . James G. Dougherty, Integrated Systems Silicon LTD, Belfast, Northern Ireland ISS an...
DATE
2009
IEEE
14 years 21 hour ago
2009
IEEE
The automated design of SoCs from pre-selected IPs that may require different clocks is challenging because of the following issues. Firstly, protocol mismatches between IPs need ...
MEMOCODE
2007
IEEE
13 years 11 months ago
2007
IEEE
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
ICCAD
2008
IEEE
14 years 2 months ago
2008
IEEE
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
The advent of nanometer feature sizes in silicon fabrication has triggered a number of new design challenges for computer designers. These challenges include design complexity and...