40 search results - page 8 / 8 » A Data Symmetry Reduction Technique for Temporal-epistemic L... |
FMCAD
1998
Springer
13 years 10 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
ITC
1998
IEEE
13 years 10 months ago
1998
IEEE
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
VTS
2000
IEEE
13 years 10 months ago
2000
IEEE
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
CODES
2008
IEEE
14 years 7 days ago
2008
IEEE
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
VMCAI
2004
Springer
13 years 11 months ago
2004
Springer
Shape analysis is a promising technique for statically verifying and extracting properties of programs that manipulate complex data structures. We introduce a new characterization...