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» A Design Method for Heterogeneous Adders
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VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 6 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
ISCAS
2005
IEEE
187views Hardware» more  ISCAS 2005»
13 years 11 months ago
New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination
Abstract— In this paper, we propose a novel common subexpresson elimination (CSE) method to be used for VLSI design of multiplierless finite impulse response (FIR) filter with ...
Yasuhiro Takahashi, Michio Yokoyama
ASAP
2007
IEEE
107views Hardware» more  ASAP 2007»
14 years 4 days ago
A Hardware-Oriented Method for Evaluating Complex Polynomials
A hardware-oriented method for evaluating complex polynomials by solving iteratively a system of linear equations is proposed. Its implementation uses a digit-serial iterations on...
Milos D. Ercegovac, Jean-Michel Muller
WIKIS
2006
ACM
13 years 11 months ago
Corporate wiki users: results of a survey
A survey of 168 corporate wiki users was conducted. Findings indicate that corporate wikis appear to be sustainable. Users stated three main types of benefits from corporate wikis...
Ann Majchrzak, Christian Wagner, Dave Yates
CAD
2004
Springer
13 years 5 months ago
Feature-based design for heterogeneous objects
Heterogeneous objects are objects composed of different constituent materials. In these objects, multiple desirable properties from different constituent materials can be synthesi...
Xiaoping Qian, Debasish Dutta