126 search results - page 2 / 26 » A Design Methodology for the Exploitation of High Level Comm... |
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
VTS
1999
IEEE
13 years 9 months ago
1999
IEEE
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
FCCM
2004
IEEE
13 years 8 months ago
2004
IEEE
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
DATE
1997
IEEE
13 years 9 months ago
1997
IEEE
A design methodology for the synthesis of digital circuits used in high throughput digital modems is presented. The methodology spans digital modem design from the link level to t...