6 search results - page 1 / 2 » A FPGA-based Parallel Architecture for Scalable High-Speed P... |
ASAP
2009
IEEE
13 years 9 months ago
2009
IEEE
INFOCOM
2003
IEEE
13 years 9 months ago
2003
IEEE
Abstract—Link bundling is a way to increase routing scalability whenever a pair of Label Switching Routers in MPLS are connected by multiple parallel links. However, link bundlin...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
GLOBECOM
2009
IEEE
13 years 8 months ago
2009
IEEE
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
AINA
2005
IEEE
13 years 10 months ago
2005
IEEE
With the explosive growth of Internet traffic, the next generation switches are designed to provide forwarding speed up to 10Gbps or above. To meet the challenges of delivering wi...