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ARVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
NOCS
2010
IEEE
13 years 4 months ago
2010
IEEE
DATE
2009
IEEE
14 years 27 days ago
2009
IEEE
—This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for e...
EUROPAR
2000
Springer
13 years 9 months ago
2000
Springer
A hybrid approach that utilizes both statistical techniques and empirical methods seeks to provide more information about the performance of an application. In this paper, we prese...
ISCA
2012
IEEE
11 years 8 months ago
2012
IEEE
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...