68 search results - page 13 / 14 » A Family of Logical Fault Models for Reversible Circuits |
DAC
2007
ACM
14 years 6 months ago
2007
ACM
Negative bias temperature instability (NBTI) in MOSFETs is one of the major reliability challenges in nano-scale technology. This paper presents an efficient technique to characte...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
DAC
2001
ACM
14 years 6 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
CONSTRAINTS
2007
13 years 5 months ago
2007
In the ECAD area, the Test Generation (TG) problem consists in finding an input vector test for some possible diagnosis (a set of faults) of a digital circuit. Such tests may have ...
ASPLOS
2011
ACM
12 years 9 months ago
2011
ACM
This paper presents S2E, a platform for analyzing the properties and behavior of software systems. We demonstrate S2E’s use in developing practical tools for comprehensive perfo...