68 search results - page 3 / 14 » A Family of Logical Fault Models for Reversible Circuits |
DATE
2008
IEEE
14 years 12 days ago
2008
IEEE
This paper presents a concurrent error detection technique targeted towards control logic in a processor with emphasis on low area overhead. Rather than detect all modeled transie...
ITC
1995
IEEE
13 years 9 months ago
1995
IEEE
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
ET
2010
13 years 3 months ago
2010
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
DAC
2000
ACM
13 years 10 months ago
2000
ACM
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
ISQED
2009
IEEE
14 years 23 days ago
2009
IEEE
With technology scaling, the occurrence rate of not only single, but also multiple transients resulting from a single hit is increasing. In this work, we consider the effect of th...