4 search results - page 1 / 1 » A Fast Read Write Process to Reduce RDMA Communication Laten... |
IWNAS
2006
IEEE
13 years 10 months ago
2006
IEEE
RDMA reduces network latency by eliminating unnecessary copies from network interface cards to application buffers, but how to reduce memory registration cost is a challenge. Prev...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
HPCA
2012
IEEE
12 years 8 days ago
2012
IEEE
Phase change memory (PCM) recently has emerged as a promising technology to meet the fast growing demand for large capacity memory in modern computer systems. In particular, multi...
ISQED
2010
IEEE
13 years 3 months ago
2010
IEEE
Low power, minimum transistor count and fast access static random access memory (SRAM) is essential for embedded multimedia and communication applications realized using system on...