24 search results - page 1 / 5 » A Framework for Coarse-Grain Optimizations in the On-Chip Me... |
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
CAL
2007
13 years 4 months ago
2007
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed memory hierarchy enhancements for coher...
ERSA
2004
13 years 6 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
SCOPES
2005
Springer
13 years 10 months ago
2005
Springer
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
IEEEPACT
2008
IEEE
13 years 11 months ago
2008
IEEE
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...