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ICCAD
2001
IEEE
86views Hardware» more  ICCAD 2001»
14 years 1 months ago
System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip
In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
Tony Givargis, Frank Vahid, Jörg Henkel
ISVLSI
2008
IEEE
173views VLSI» more  ISVLSI 2008»
13 years 11 months ago
System Level Design Space Exploration for Multiprocessor System on Chip
Future embedded systems will integrate hundreds of processors. Current design space exploration methods cannot cope with such a complexity. It is mandatory to extend these methods...
Issam Maalej, Guy Gogniat, Jean Luc Philippe, Moha...
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 1 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li
ASIAN
2004
Springer
107views Algorithms» more  ASIAN 2004»
13 years 10 months ago
A Framework for Compiler Driven Design Space Exploration for Embedded System Customization
Designing custom solutions has been central to meeting a range of stringent and specialized needs of embedded computing, along such dimensions as physical size, power consumption, ...
Krishna V. Palem, Lakshmi N. Chakrapani, Sudhakar ...
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu