Sciweavers

23 search results - page 2 / 5
» A Framework for the Validation of Processor Architecture Com...
Sort
View
IPPS
2007
IEEE
13 years 11 months ago
SWARM: A Parallel Programming Framework for Multicore Processors
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...
David A. Bader, Varun Kanade, Kamesh Madduri
TVLSI
2008
151views more  TVLSI 2008»
13 years 5 months ago
Guest Editorial Special Section on Design Verification and Validation
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
I. Harris, D. Pradhan
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
13 years 11 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
DSN
2004
IEEE
13 years 9 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
ENTCS
2010
82views more  ENTCS 2010»
13 years 5 months ago
A Strict-Observational Interface Theory for Analysing Service Orchestrations
Service oriented computing is an accepted architectural style for developing large, distributed software systems. A particular promise of such architectures is service orchestrati...
Philip Mayer, Andreas Schroeder, Sebastian S. Baue...