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IPPS
2006
IEEE
13 years 11 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
TPDS
1998
157views more  TPDS 1998»
13 years 5 months ago
A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
This paper presents a new compiler optimization algorithm that parallelizes applications for symmetric, sharedmemory multiprocessors. The algorithm considers data locality, parall...
Kathryn S. McKinley
LCPC
2004
Springer
13 years 11 months ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
IJHPCA
2007
116views more  IJHPCA 2007»
13 years 5 months ago
Parallel Languages and Compilers: Perspective From the Titanium Experience
We describe the rationale behind the design of key features of Titanium—an explicitly parallel dialect of JavaTM for high-performance scientific programming—and our experienc...
Katherine A. Yelick, Paul N. Hilfinger, Susan L. G...