48 search results - page 10 / 10 » A General Algorithm for Tiling the Register Level |
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
SIGMETRICS
2005
ACM
13 years 11 months ago
2005
ACM
The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowled...
DAC
2008
ACM
13 years 7 months ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...