48 search results - page 2 / 10 » A General Algorithm for Tiling the Register Level |
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
We propose REWIRED (REgister Write Inhibition by REsource Dedication), a technique for reducing power during high level synthesis (HLS) by selectively inhibiting the storage of fun...
ICCD
2002
IEEE
2002
IEEE
Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors
14 years 2 months ago
A circuit or circuit component that does not contain any spurious switching activity, i.e., activity that is not required by its specified functionality, is called perfectly power...
GECCO
2007
Springer
13 years 12 months ago
2007
Springer
Building artificial systems using self-assembly is one of the main issues of artificial life [17]. Scientists are trying to understand this process either using experimental appro...
LCTRTS
2007
Springer
13 years 12 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
BMCBI
2007
13 years 5 months ago
2007
Background: High density oligonucleotide tiling arrays are an effective and powerful platform for conducting unbiased genome-wide studies. The ab initio probe selection method emp...