Sciweavers

10 search results - page 1 / 2
» A Generic Network Interface Architecture for a Networked Pro...
Sort
View
ARCS
2008
Springer
13 years 6 months ago
A Generic Network Interface Architecture for a Networked Processor Array (NePA)
Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader ...
PPL
2008
185views more  PPL 2008»
13 years 4 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
FPL
2003
Springer
128views Hardware» more  FPL 2003»
13 years 10 months ago
A Generic Architecture for Integrated Smart Transducers
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
Martin Delvai, Ulrike Eisenmann, Wilfried Elmenrei...
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
13 years 11 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
13 years 9 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...