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» A Hierarchical Test Scheme for System-On-Chip Designs
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ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 2 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
GLVLSI
2005
IEEE
122views VLSI» more  GLVLSI 2005»
13 years 10 months ago
Thermal aware cell-based full-chip electromigration reliability analysis
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-ba...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
AINA
2007
IEEE
13 years 11 months ago
Kernel and Application Integrity Assurance: Ensuring Freedom from Rootkits and Malware in a Computer System
Malware and rootkits are serious security vulnerabilities, and they can be designed to be resistant to anti-viral software, or even totally undetectable. This paper described a hi...
Lifu Wang, Partha Dasgupta
ATAL
2009
Springer
13 years 11 months ago
Comparing trust mechanisms for monitoring aggregator nodes in sensor networks
Sensor nodes are often used to collect data from locations inaccessible or hazardous for humans. As they are not under normal supervision, these nodes are particularly susceptible...
Oly Mistry, Anil Gürsel, Sandip Sen
DAS
2006
Springer
13 years 9 months ago
Script Identification from Indian Documents
Abstract. Automatic identification of a script in a given document image facilitates many important applications such as automatic archiving of multilingual documents, searching on...
Gopal Datt Joshi, Saurabh Garg, Jayanthi Sivaswamy