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VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
14 years 5 months ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...
FSE
2009
Springer
159views Cryptology» more  FSE 2009»
13 years 11 months ago
Intel's New AES Instructions for Enhanced Performance and Security
The Advanced Encryption Standard (AES) is the Federal Information Processing Standard for symmetric encryption. It is widely believed to be secure and efficient, and is therefore b...
Shay Gueron
DSD
2006
IEEE
183views Hardware» more  DSD 2006»
13 years 11 months ago
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
Panu Hämäläinen, Timo Alho, Marko H...
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 8 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
CHES
2007
Springer
118views Cryptology» more  CHES 2007»
13 years 8 months ago
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
Graphics Processing Units (GPUs) present large potential performance gains within stream processing applications over the standard CPU. These performance gains are best realised wh...
Owen Harrison, John Waldron