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ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 7 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
EUROSYS
2008
ACM
14 years 2 months ago
Samurai: protecting critical data in unsafe languages
Programs written in type-unsafe languages such as C and C++ incur costly memory errors that result in corrupted data structures, program crashes, and incorrect results. We present...
Karthik Pattabiraman, Vinod Grover, Benjamin G. Zo...
TCAD
2008
167views more  TCAD 2008»
13 years 5 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
DATE
2004
IEEE
136views Hardware» more  DATE 2004»
13 years 8 months ago
Compact Binaries with Code Compression in a Software Dynamic Translator
Embedded software is becoming more flexible and adaptable, which presents new challenges for management of highly constrained system resources. Software dynamic translation is a t...
Stacey Shogan, Bruce R. Childers
ASPLOS
2000
ACM
13 years 9 months ago
Power Aware Page Allocation
One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory ...
Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schl...