22 search results - page 4 / 5 » A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm |
JETC
2008
13 years 3 months ago
2008
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
ICIP
1997
IEEE
13 years 8 months ago
1997
IEEE
A novel algorithm is described for coding objects in video compression systems which gives complete control over the bit allocation to the video objects. The method is evaluated b...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
AES
2005
Springer
13 years 5 months ago
2005
Springer
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...