18 search results - page 2 / 4 » A Methodology for Energy Efficient FPGA Designs Using Mallea... |
FPL
2010
Springer
13 years 2 months ago
2010
Springer
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
RECONFIG
2008
IEEE
13 years 11 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
FPGA
1999
ACM
13 years 9 months ago
1999
ACM
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
DAC
2007
ACM
14 years 5 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
RSP
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...