Precise chip-level timing requires careful modeling of the interaction between logic drivers and interconnect. Existing static-timing analysis methodologies generate models for dr...
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
This paper compares several indexing methods for person names extracted from text, developed for an information retrieval system with requirements for fast approximate matching of...
Witnesses and victims of serious crime are often required to construct a facial composite, a visual likeness of a suspect’s face. The traditional method is for them to select in...
Charlie D. Frowd, Vicki Bruce, Melanie Pitchford, ...
This paper proposes a framework that provides significant speed-ups and also improves the effectiveness of general message passing algorithms based on dual LP relaxations. It is ap...