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» A New Approach to the Rectilinear Steiner Tree Problem
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VLSID
2002
IEEE
109views VLSI» more  VLSID 2002»
14 years 5 months ago
Probabilistic Analysis of Rectilinear Steiner Trees
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner t...
Chunhong Chen
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
13 years 9 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden
SODA
2000
ACM
114views Algorithms» more  SODA 2000»
13 years 6 months ago
The rectilinear Steiner arborescence problem is NP-complete
Given a set P of points in the first quadrant, a Rectilinear Steiner Arborescence (RSA) is a directed tree rooted at the origin, containing all points in P, and composed solely of...
Weiping Shi, Chen Su
DAC
1994
ACM
13 years 9 months ago
Rectilinear Steiner Trees with Minimum Elmore Delay
We provide a new theoretical framework for constructing Steiner routing trees with minimum Elmore delay. Earlier work [3, 13] has established Elmore delay as a high delity estima...
Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCo...
ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
12 years 12 days ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...