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GLVLSI
2000
IEEE

Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures

9 years 11 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the interconnect problem by reducing wire lengths directly. We present a non-Manhattan Steiner tree heuristic, obtaining wire length reductions of much as 17% on average, when compared to rectilinear topologies. Moreover, we present a graph-based interconnect optimization algorithm, called the GRATS-tree algorithm, which allows performance optimization beyond what can be obtained through wire length reduction alone. The two tree construction algorithms are integrated into a new global router that allows large scale non-Manhattan design. Although we consider circuit placements performed under rectilinear objectives, our global router can reduce maximum congestion levels by as much as 20%. In general we find that the nonManhattan approach requires additional Steiner points and bends; realization of non-Manhattan ro...
Cheng-Kok Koh, Patrick H. Madden
Added 31 Jul 2010
Updated 31 Jul 2010
Type Conference
Year 2000
Where GLVLSI
Authors Cheng-Kok Koh, Patrick H. Madden
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