3 search results - page 1 / 1 » A New Methodology for Interconnect Parasitics Extraction Con... |
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Abstract-- Due to photo-lithography effects and manufacture process variations, the actual features fabricated on the wafer are different from the designed ones. This difference ca...
TVLSI
2002
13 years 4 months ago
2002
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...