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ISCAS
2007
IEEE
112views Hardware» more  ISCAS 2007»
13 years 11 months ago
A New Statistical Approach for Glitch Estimation in Combinational Circuits
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...
Ahmed Sayed, Hussain Al-Asaad
VLSID
2008
IEEE
153views VLSI» more  VLSID 2008»
14 years 5 months ago
Total Power Minimization in Glitch-Free CMOS Circuits Considering Process Variation
Compared to subthreshold leakage, dynamic power is normally much less sensitive to the process variation due to its approximately linear relation to the process parameters. Howeve...
Yuanlin Lu, Vishwani D. Agrawal
GLVLSI
2007
IEEE
111views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Probabilistic gate-level power estimation using a novel waveform set method
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Ein...
ICCAD
1992
IEEE
148views Hardware» more  ICCAD 1992»
13 years 8 months ago
McPOWER: a Monte Carlo approach to power estimation
Excessive power dissipation in integrated circuits causes overheating and can lead to soft errors and or permanent damage. The severity of the problem increases in proportion to t...
Richard Burch, Farid N. Najm, Ping Yang, Timothy N...