278 search results - page 2 / 56 » A Novel Approach to Improve the Performance of Interconnecti... |
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
This paper presents a very efficient algorithm for performance-driven topology design for interconnects. Given a net, it first generates A-tree1 topology using table lookup and net...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
— Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon...
PDCAT
2007
Springer
13 years 12 months ago
2007
Springer
Any simulation-based evaluation of an interconnection network proposal requires a good characterization of the workload. Synthetic traffic patterns based on independent traffic so...
ISCA
2007
IEEE
14 years 1 days ago
2007
IEEE
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
AINA
2007
IEEE
14 years 2 days ago
2007
IEEE
Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip-multiprocessor...