8 search results - page 1 / 2 » A Novel Approach to Reduce L2 Miss Latency in Shared-Memory ... |
IPPS
2002
IEEE
13 years 9 months ago
2002
IEEE
EUROPAR
2005
Springer
13 years 10 months ago
2005
Springer
There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to ...
MAM
2002
13 years 4 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
JSA
2008
13 years 4 months ago
2008
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
SRDS
1998
IEEE
13 years 9 months ago
1998
IEEE
Software-controlled cache prefetching and data forwarding are widely used techniques for tolerating memory latency in shared memory multiprocessors. However, some previous studies...