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» A Novel Processor Architecture for McEliece Cryptosystem and...
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ASAP
2009
IEEE
115views Hardware» more  ASAP 2009»
14 years 2 months ago
A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms
McEliece scheme represents a code-based public-key cryptosystem. So far, this cryptosystem was not employed because of efficiency questions regarding performance and communicatio...
Abdulhadi Shoufan, Thorsten Wink, H. Gregor Molter...
FPL
2008
Springer
157views Hardware» more  FPL 2008»
13 years 6 months ago
Chosen-message SPA attacks against FPGA-based RSA hardware implementations
This paper presents SPA (Simple Power Analysis) attacks against public-key cryptosystems implemented on an FPGA platform. The SPA attack investigates a power waveform generated by...
Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Ak...
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
13 years 11 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
13 years 8 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
13 years 9 months ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...