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» A Parallel Evolutionary Algorithm for Circuit Partitioning
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EURODAC
1994
IEEE
117views VHDL» more  EURODAC 1994»
13 years 9 months ago
A hardware environment for prototyping and partitioning based on multiple FPGAs
This paper presents a multiple-FPGA-based experimentation board. The problem to be solved is that of implementing a circuit into a set of FPGAs. This board provides a hardware env...
Marc Wendling, Wolfgang Rosenstiel
TEC
2002
119views more  TEC 2002»
13 years 5 months ago
Graph-based evolutionary design of arithmetic circuits
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshik...
DAC
1994
ACM
13 years 9 months ago
Acyclic Multi-Way Partitioning of Boolean Networks
Acyclic partitioning on combinational boolean networks has wide range of applications, from multiple FPGA chip partitioning to parallel circuit simulation. In this paper, we prese...
Jason Cong, Zheng Li, Rajive Bagrodia
FPGA
1995
ACM
116views FPGA» more  FPGA 1995»
13 years 9 months ago
Logic Partition Orderings for Multi-FPGA Systems
One of the critical issues for multi-FPGA systems is developing software tools for automatically mapping circuits. In this paper we consider one step in this process, partitioning...
Scott Hauck, Gaetano Borriello
ICCSA
2005
Springer
13 years 11 months ago
A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement
Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The prima...
Mahmood R. Minhas, Sadiq M. Sait