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GLVLSI
2007
IEEE
107views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Side-channel resistant system-level design flow for public-key cryptography
In this paper, we propose a new design methodology to assess the risk for side-channel attacks, more specifically timing analysis and simple power analysis, at an early design st...
Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingr...
ICISC
2009
125views Cryptology» more  ICISC 2009»
13 years 2 months ago
Power Analysis of Single-Rail Storage Elements as Used in MDPL
Several dual-rail logic styles make use of single-rail flip-flops for storing intermediate states. We show that single mask bits, as applied by various side-channel resistant logic...
Amir Moradi, Thomas Eisenbarth, Axel Poschmann, Ch...
ITNG
2007
IEEE
13 years 11 months ago
SPA resistant Elliptic Curve Cryptosystem using Addition Chains
: There has been a lot of interest in recent years in the problems faced by cryptosystems due to side channel attacks. Algorithms for elliptic curve point scalar multiplication suc...
Andrew Byrne, Nicolas Meloni, Francis M. Crowe, Wi...
CODES
2003
IEEE
13 years 10 months ago
Security wrappers and power analysis for SoC technologies
Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resi...
Catherine H. Gebotys, Y. Zhang
AFRICACRYPT
2010
Springer
13 years 11 months ago
Fresh Re-keying: Security against Side-Channel and Fault Attacks for Low-Cost Devices
The market for RFID technology has grown rapidly over the past few years. Going along with the proliferation of RFID technology is an increasing demand for secure and privacy-prese...
Marcel Medwed, François-Xavier Standaert, J...