Sciweavers

8 search results - page 2 / 2
» A Partitioning and Storage Based Built-In Test Pattern Gener...
Sort
View
ICES
2000
Springer
140views Hardware» more  ICES 2000»
13 years 8 months ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
VTS
2003
IEEE
119views Hardware» more  VTS 2003»
13 years 10 months ago
Test Data Compression Using Dictionaries with Fixed-Length Indices
—We present a dictionary-based test data compression approach for reducing test data volume and testing time in SOCs. The proposed method is based on the use of a small number of...
Lei Li, Krishnendu Chakrabarty
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
13 years 11 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...