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ICCD
2006
IEEE
101views Hardware» more  ICCD 2006»
14 years 1 months ago
A Pattern Generation Technique for Maximizing Power Supply Currents
Kunal P. Ganeshpure, Alodeep Sanyal, Sandip Kundu
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
13 years 9 months ago
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects
When testing delay faults on critical paths, conventional structural test patterns may be applied in functionally-unreachable states, leading to over-testing or under-testing of t...
Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 1 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
DAC
2007
ACM
14 years 5 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
13 years 2 months ago
Characterizing within-die variation from multiple supply port IDDQ measurements
-- The importance of within-die process variation and its impact on product yield has increased significantly with scaling. Within-die variation is typically monitored by embedding...
Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic