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MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
13 years 10 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
HPCA
1999
IEEE
13 years 9 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
DAC
2000
ACM
14 years 6 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
ASPLOS
2011
ACM
12 years 9 months ago
Inter-core prefetching for multicore processors using migrating helper threads
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen
SIGMOD
2007
ACM
121views Database» more  SIGMOD 2007»
14 years 5 months ago
EaseDB: a cache-oblivious in-memory query processor
We propose to demonstrate EaseDB, the first cache-oblivious query processor for in-memory relational query processing. The cacheoblivious notion from the theory community refers t...
Bingsheng He, Yinan Li, Qiong Luo, Dongqing Yang