8 search results - page 2 / 2 » A Practical Algorithm for Retiming Level-Clocked Circuits |
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
FMCAD
2007
Springer
13 years 12 months ago
2007
Springer
We present a formulation of retiming to minimize the number of registers in a design by iterating a maximum network flow problem. The retiming returned will be the optimum one whi...
ICCAD
1998
IEEE
13 years 10 months ago
1998
IEEE
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...