Mapping packet processing applications onto embedded network processors (NP) is a challenging task due to the unique constraints of NP systems and the characteristics of network a...
Jia Yu, Jingnan Yao, Jun Yang 0002, Laxmi N. Bhuya...
This paper surveys recent results in the area of virtual path layout in ATM networks. We present a model for the theoretical study of these layouts the model amounts to covering t...
This paper describes a single-version algorithmic approach to design in fault tolerant computing in various computing systems by using static redundancy in order to mask transient...
In this paper we define a recursive semantics for warrant in a general defeasible argumentation framework by formalizing a notion of collective (non-binary) conflict among argumen...
Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...
V. Kheterpal, V. Rovner, T. G. Hersan, D. Motiani,...