26 search results - page 2 / 6 » A Reconfigurable Shared Scan-in Architecture |
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
IPPS
2003
IEEE
13 years 10 months ago
2003
IEEE
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
ERSA
2007
13 years 6 months ago
2007
Abstract: If the computational demands of an interactive graphics rendering application cannot be met by a single commodity Graphics Processing Unit (GPU), multiple graphics accele...
DAC
2004
ACM
13 years 10 months ago
2004
ACM
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
APCSAC
2001
IEEE
13 years 8 months ago
2001
IEEE
Traditional reconfigurable computing platforms are designed to be single user and have been acknowledged to be difficult to design applications for. The design tools are still pri...