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» A System Design Methodology for Reducing System Integration ...
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DAC
1999
ACM
13 years 9 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...
DATE
2004
IEEE
97views Hardware» more  DATE 2004»
13 years 8 months ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
ECBS
2008
IEEE
170views Hardware» more  ECBS 2008»
13 years 5 months ago
A Platform-Based Software Design Methodology for Embedded Control Systems: An Agile Toolkit
A discrete control system, with stringent hardware constraints, is effectively an embedded real-time system and hence requires a rigorous methodology to develop the software invol...
Lucas Cordeiro, Carlos Mar, Eduardo Valentin, Fabi...
DT
2006
180views more  DT 2006»
13 years 4 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...
ASYNC
2002
IEEE
120views Hardware» more  ASYNC 2002»
13 years 9 months ago
Relative Timing Based Verification of Timed Circuits and Systems
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
Peter A. Beerel, Ken S. Stevens, Hoshik Kim