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ASPDAC
2007
ACM
74views Hardware» more  ASPDAC 2007»
13 years 8 months ago
A Theoretical Study on Wire Length Estimation Algorithms for Placement with Opaque Blocks
How to estimate the shortest routing length when certain blocks are considered as routing obstacles is becoming an essential problem for block placement because HPWL is no longer v...
Tan Yan, Shuting Li, Yasuhiro Takashima, H. Murata
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 1 months ago
Fast wire length estimation by net bundling for block placement
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
Tan Yan, Hiroshi Murata
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
13 years 11 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
ICALP
2010
Springer
13 years 9 months ago
Placing Regenerators in Optical Networks to Satisfy Multiple Sets of Requests
The placement of regenerators in optical networks has become an active area of research during the last years. Given a set of lightpaths in a network G and a positive integer d, re...
George B. Mertzios, Ignasi Sau, Mordechai Shalom, ...