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» A VLSI Algorithm for Modular Multiplication Division
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ISVLSI
2006
IEEE
104views VLSI» more  ISVLSI 2006»
13 years 11 months ago
Adaptive Signal Processing in Mixed-Signal VLSI with Anti-Hebbian Learning
We describe analog and mixed-signal primitives for implementing adaptive signal-processing algorithms in VLSI based on anti-Hebbian learning. Both on-chip calibration techniques a...
Miguel Figueroa, Esteban Matamala, Gonzalo Carvaja...
ARITH
2005
IEEE
13 years 11 months ago
Fast Modular Reduction for Large Wordlengths via One Linear and One Cyclic Convolution
Abstract— Modular reduction is a fundamental operation in cryptographic systems. Most well known modular reduction methods including Barrett’s and Montgomery’s algorithms lev...
Dhananjay S. Phatak, Tom Goff
RECONFIG
2008
IEEE
184views VLSI» more  RECONFIG 2008»
13 years 12 months ago
FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m)
This paper describes an efficient arithmetic processor for elliptic curve cryptography. The proposed processor consists of special architectural components, the most important of...
Ilker Yavuz, Siddika Berna Ors Yalcin, Çeti...
ISSAC
2007
Springer
142views Mathematics» more  ISSAC 2007»
13 years 11 months ago
Fast arithmetic for triangular sets: from theory to practice
We study arithmetic operations for triangular families of polynomials, concentrating on multiplication in dimension zero. By a suitable extension of fast univariate Euclidean divi...
Xin Li, Marc Moreno Maza, Éric Schost
RECONFIG
2008
IEEE
268views VLSI» more  RECONFIG 2008»
13 years 12 months ago
Parametric, Secure and Compact Implementation of RSA on FPGA
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
Ersin Oksuzoglu, Erkay Savas