3 search results - page 1 / 1 » A VLSI Design Flow for Secure Side-Channel Attack Resistant ... |
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
CHES
2006
Springer
13 years 8 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we propose a new design methodology to assess the risk for side-channel attacks, more specifically timing analysis and simple power analysis, at an early design st...