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» A Variation Aware High Level Synthesis Framework
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TVLSI
2010
12 years 11 months ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
13 years 10 months ago
Layout driven data communication optimization for high level synthesis
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer...
DATE
2002
IEEE
101views Hardware» more  DATE 2002»
13 years 9 months ago
EAC: A Compiler Framework for High-Level Energy Estimation and Optimization
This paper presents a novel Energy-Aware Compilation (EAC) framework that can estimate and optimize energy consumption of a given code taking as input the architectural and techno...
Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vija...
CAV
2008
Springer
131views Hardware» more  CAV 2008»
13 years 6 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
DAC
1999
ACM
14 years 5 months ago
Soft Scheduling in High Level Synthesis
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
Jianwen Zhu, Daniel Gajski